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NXP Semiconductors
LPC1111/12/13/14
Table 4.
LPC1114 pin description table (PLCC44 package) …continued
Symbol
V DD(IO)
V DD(3V3)
Pin
12 [4]
1 [4]
Type
I
I
Description
3.3 V input/output supply voltage.
3.3 V supply voltage to the internal regulator and the ADC. Also used as the
ADC reference voltage.
V SSIO
XTALIN
9
10 [5]
I
I
Ground.
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
XTALOUT
V SS
11 [5]
43
O
I
Output from the oscillator amplifier.
Ground.
[1]
[2]
[3]
[4]
[5]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
I 2 C-bus pads compliant with the I 2 C-bus specification for I 2 C standard mode and I 2 C Fast-mode Plus.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant.
Tie together V DD(3V3) and V DD(IO) externally. If separate supplies are used for V DD(3V3) and V DD(IO) , ensure that the voltage difference
between both supplies is smaller than or equal to 0.5 V.
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
LPC1111_12_13_14_0
? NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 00.11 — 13 November 2009
14 of 53
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